The following are additional reference materials for OpenCAPI Developers and includes the OpenCAPI simulation environment (OCSE), reference designs, a tool that enables you to quickly isolate a function to place on an FPGA to accelerate a function, libraries and more. These are all posted on GitHub and available to any person with a GitHub account.
Simulation and Accelerator Development Frameworks
· OpenCAPI Simulation Environment (OCSE)
o https://github.com/OpenCAPI/ocse
· OpenCAPI Acceleration Framework (OC-Accel) for accelerator development
o https://github.com/OpenCAPI/oc-accel
o https://github.com/OpenCAPI/oc-utils
§ Accompanied Documentation
o https://github.com/OpenCAPI/oc-accel-doc
· User-space Library and Driver for OpenCAPI Accelerator Development (LibOCXL and OCXL)
ohttps://github.com/OpenCAPI/libocxl
OpenCAPI 3.0 Material
· OpenCAPI 3.0 Transaction Layer (TLx) / Data Layer (DLx) / Configuration (CFG) Device FPGA Reference Design & Vivado Project Build Flow
ohttps://github.com/OpenCAPI/OpenCAPI3.0_Client_RefDesign
§ Accompanied Documentation
ohttps://github.com/OpenCAPI/OpenCAPI3.0_Client_RefDesign/tree/master/reference_design_doc
· OpenCAPI Accelerator Functional Unit (AFU) Address Space Usage Engineering Note
ohttps://github.com/OpenCAPI/OpenCAPI3.0_Client_RefDesign/tree/master/config_subsystem/doc
· Accelerator Functional Performance (AFP) RTL and Application Accelerator Example #1
o https://github.com/OpenCAPI/OpenCAPI3.0_Client_RefDesign/tree/master/afu/afp
· Lowest Point of Coherency (LPC) RTL and Application Accelerator Example #2
o https://github.com/OpenCAPI/OpenCAPI3.0_Client_RefDesign/tree/master/afu/lpc
§ Accompanied Documentation
ohttps://github.com/OpenCAPI/OpenCAPI3.0_Client_RefDesign/tree/master/afu/lpc/doc
· Thymesisflow – Memory Disaggregation Example using OpenCAPI 3.0 Example #3
o https://github.com/OpenCAPI/ThymesisFlow
OpenCAPI 3.1 (Open Memory Interface (OMI)) Material
· OMI Transaction Layer (TLx) / Data Layer (DLx) /Configuration (CFG) Host FPGA Reference Design
o https://github.com/OpenCAPI/omi_host_fire
· OMI Transaction Layer (TLx) / Data Layer (DLx) /Configuration (CFG) Device FPGA Reference Design
o https://github.com/OpenCAPI/omi_device_ice
· OMI Transaction Layer (TLx) / Data Layer (DLx) /Configuration (CFG) Device ASIC Reference Design
ohttps://github.com/OpenCAPI/omi_asic_device_reference_design
·OMI Reference Design Configuration andInitialization of a Xilinx VCU128 FMC+ Development Board
o https://github.com/OpenCAPI/omi_enablement